{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1653422030845 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 64-Bit " "Running Quartus II 64-Bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition " "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1653422030846 ""} { "Info" "IQEXE_START_BANNER_TIME" "Tue May 24 22:53:50 2022 " "Processing started: Tue May 24 22:53:50 2022" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1653422030846 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1653422030846 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off parallel_load_shift_register -c parallel_load_shift_register " "Command: quartus_map --read_settings_files=on --write_settings_files=off parallel_load_shift_register -c parallel_load_shift_register" {  } {  } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1653422030846 ""}
{ "Warning" "WQCU_PARALLEL_NO_LICENSE" "" "Parallel compilation is not licensed and has been disabled" {  } {  } 0 20028 "Parallel compilation is not licensed and has been disabled" 0 0 "Quartus II" 0 -1 1653422031026 ""}
{ "Error" "EVRFX_VERI_SYNTAX_ERROR" "\"while\";  expecting \"end\" parallel_load_shift_register.v(47) " "Verilog HDL syntax error at parallel_load_shift_register.v(47) near text \"while\";  expecting \"end\"" {  } { { "parallel_load_shift_register.v" "" { Text "C:/Users/simay/OneDrive/Masaüstü/ODTÜ 3. Dönem/EEE248/Lab 4 and 5/Parallel_Load_Shift_Register Verilog Code/parallel_load_shift_register.v" 47 0 0 } }  } 0 10170 "Verilog HDL syntax error at %2!s! near text %1!s!" 0 0 "Quartus II" 0 -1 1653422031055 ""}
{ "Error" "EVRFX_VERI_SYNTAX_ERROR" "\"==\";  expecting \".\", or an identifier parallel_load_shift_register.v(47) " "Verilog HDL syntax error at parallel_load_shift_register.v(47) near text \"==\";  expecting \".\", or an identifier" {  } { { "parallel_load_shift_register.v" "" { Text "C:/Users/simay/OneDrive/Masaüstü/ODTÜ 3. Dönem/EEE248/Lab 4 and 5/Parallel_Load_Shift_Register Verilog Code/parallel_load_shift_register.v" 47 0 0 } }  } 0 10170 "Verilog HDL syntax error at %2!s! near text %1!s!" 0 0 "Quartus II" 0 -1 1653422031055 ""}
{ "Error" "EVRFX_VERI_SYNTAX_ERROR" "\"1\";  expecting an identifier parallel_load_shift_register.v(48) " "Verilog HDL syntax error at parallel_load_shift_register.v(48) near text \"1\";  expecting an identifier" {  } { { "parallel_load_shift_register.v" "" { Text "C:/Users/simay/OneDrive/Masaüstü/ODTÜ 3. Dönem/EEE248/Lab 4 and 5/Parallel_Load_Shift_Register Verilog Code/parallel_load_shift_register.v" 48 0 0 } }  } 0 10170 "Verilog HDL syntax error at %2!s! near text %1!s!" 0 0 "Quartus II" 0 -1 1653422031055 ""}
{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "top parallel_load_shift_register.v(37) " "Ignored design unit \"top\" at parallel_load_shift_register.v(37) due to previous errors" {  } { { "parallel_load_shift_register.v" "" { Text "C:/Users/simay/OneDrive/Masaüstü/ODTÜ 3. Dönem/EEE248/Lab 4 and 5/Parallel_Load_Shift_Register Verilog Code/parallel_load_shift_register.v" 37 0 0 } }  } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Quartus II" 0 -1 1653422031055 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "parallel_load_shift_register.v 0 0 " "Found 0 design units, including 0 entities, in source file parallel_load_shift_register.v" {  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1653422031057 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d_ff_r_l.v 1 1 " "Found 1 design units, including 1 entities, in source file d_ff_r_l.v" { { "Info" "ISGN_ENTITY_NAME" "1 D_FF_R_L " "Found entity 1: D_FF_R_L" {  } { { "D_FF_R_L.v" "" { Text "C:/Users/simay/OneDrive/Masaüstü/ODTÜ 3. Dönem/EEE248/Lab 4 and 5/Parallel_Load_Shift_Register Verilog Code/D_FF_R_L.v" 1 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1653422031057 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1653422031057 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "two_one_mux.v 1 1 " "Found 1 design units, including 1 entities, in source file two_one_mux.v" { { "Info" "ISGN_ENTITY_NAME" "1 two_one_mux " "Found entity 1: two_one_mux" {  } { { "two_one_mux.v" "" { Text "C:/Users/simay/OneDrive/Masaüstü/ODTÜ 3. Dönem/EEE248/Lab 4 and 5/Parallel_Load_Shift_Register Verilog Code/two_one_mux.v" 1 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1653422031057 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1653422031057 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "four_bit_up_down_counter.v 1 1 " "Found 1 design units, including 1 entities, in source file four_bit_up_down_counter.v" { { "Info" "ISGN_ENTITY_NAME" "1 four_bit_up_down_counter " "Found entity 1: four_bit_up_down_counter" {  } { { "four_bit_up_down_counter.v" "" { Text "C:/Users/simay/OneDrive/Masaüstü/ODTÜ 3. Dönem/EEE248/Lab 4 and 5/Parallel_Load_Shift_Register Verilog Code/four_bit_up_down_counter.v" 1 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1653422031063 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1653422031063 ""}
{ "Error" "EQEXE_ERROR_COUNT" "Analysis & Synthesis 4 s 1  Quartus II 64-Bit " "Quartus II 64-Bit Analysis & Synthesis was unsuccessful. 4 errors, 1 warning" { { "Error" "EQEXE_END_PEAK_VSIZE_MEMORY" "4565 " "Peak virtual memory: 4565 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1653422031107 ""} { "Error" "EQEXE_END_BANNER_TIME" "Tue May 24 22:53:51 2022 " "Processing ended: Tue May 24 22:53:51 2022" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1653422031107 ""} { "Error" "EQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1653422031107 ""} { "Error" "EQEXE_ELAPSED_CPU_TIME" "00:00:00 " "Total CPU time (on all processors): 00:00:00" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1653422031107 ""}  } {  } 0 0 "%6!s! %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1653422031107 ""}
